New service validates accuracy of an integrated circuit's boundary-scan description file
BSDL files describe the boundary-scan test functionality of an integrated circuit. To generate boundary-scan tests for an assembled printed circuit board, every device on a boundary-scan chain on the board must have an accurate BSDL file.
ASSET's test programming and consulting services operation, Ensure DFT™ (EDFT), will perform the BSDLworks validation services using specially developed software and hardware fixtures that are specific to each device being tested or each device family.
"The reasons why semiconductor suppliers and OEMs would subscribe to BSDLworks are straightforward," said Glenn Woppman, president and CEO of ASSET InterTech. "First, OEMs are putting pressure on semiconductor suppliers to provide accurate BSDL files because this shortens the time-to-market for the OEM's products. Any inaccuracy in a BSDL file is going to dramatically increase test development time and this can significantly delay a system's introduction to the market and increase the costs associated with its development. And for OEMs, who may be validating the BSDL file for an application specific integrated circuit (ASIC), an accurate BSDL file is needed if the assembled board is to be tested or programmed efficiently. Again, this shortens a system's time-to-market, reduces the cost of test and simplifies manufacturing."
ASSET is offering an attractive logo that chip suppliers can display on a device's data sheet or on the company's web site. This "Validated by ASSET" logo (See enclosed logo artwork.) tells manufacturers that the silicon supplier is confident in the accuracy of the BSDL file because it has been validated by a respected third-party using a thorough process. Validated BSDL files will be available from the silicon vendor or from ASSET's web-based model library, which can be accessed by ASSET customers.
BSDLworks goes well beyond the mere checking of the syntax and semantics of a BSDL file. ASSET's EDFT personnel perform empirical functional tests to verify the accuracy of the contents of the BSDL file and to validate that the device's boundary-scan capabilities function properly. A test fixture is produced for each integrated circuit device or family of devices, and a set of boundary-scan tests are generated from a device's BSDL file. These tests are run on the device to validate that the BSDL file exactly matches the features implemented in silicon. If any anomalies are found, the BSDL file is corrected and the device is re-tested.
"Electronics manufacturers, our customers, are telling us that they value a third-party's validation of a BSDL file," Woppman explained. "Silicon vendors do a good job of documenting the BSDL files for their devices, but you can't validate the accuracy of that file unless you take a device and verify that it behaves the way the BSDL file says it will. Many times the BSDL file is completely accurate, but having the empirical validation of a third-party removes many of the questions a manufacturer may have."
In addition to specially developed software and hardware, ASSET's ScanWorks™ boundary-scan environment will be used by ASSET EDFT to validate BSDL files. ScanWorks is a boundary-scan test and ISP environment that is currently used by leading electronics companies such as Cisco, Lucent Technologies, Ericsson, Intel, Rockwell International, EMC and others.
Pricing and Availability
The BSDLworks validation service is available immediately. Pricing begins at $995 per device in volume quantities.
About ASSET InterTech
ASSET InterTech, Inc. develops, markets, sells, and supports boundary-scan testability and in-system programming (ISP) products worldwide. ASSET's PC-based ScanWorks™ environment allows users to quickly and easily test semiconductors, circuit boards or entire systems during every phase of a product's life, including design, manufacturing/repair and field maintenance. The ISP capabilities of ScanWorks can be used to load software or data into programmable devices after they have been connected to a printed circuit board. The ScanWorks product family works in conjunction with a standard of the International Electronics and Electrical Engineering (IEEE) society known as the IEEE 1149.1 (JTAG) boundary-scan test specification. ASSET's Ensure DFT Services provides high-level design-for-test engineering and development services to the electronics industry. ASSET InterTech is located outside of Dallas, TX, at 2201 North Central Expressway, Suite 105, Richardson, TX 75080.